Research in MERIT LAB

Research Overview

 MERIT Lab develops micro/nano-scale semiconductor systems where performance is ultimately determined by three capabilities:

(1) How precisely we can place functional building blocks (chips, nanowires, 2D materials) onto target substrates,

(2) How reliably we can package and operate them under thermo-mechanical and environmental stresses, and

(3) How intelligently we can analyze and predict process–structure–property relationships using data-driven models.

Our research focuses on four directions: (1) dielectrophoresis (DEP)-enabled transfer printing and heterogeneous integration, (2) moiré interferometry–based reliability/strain metrology for advanced packages and 3D semiconductors, (3) industrially relevant Si bottom-cell engineering (TOPCon/HJT) for perovskite/Si tandems, and (4) machine-learning-driven defect analytics and hybrid (physics + data) neural networks for accelerated simulation and reliability prediction.